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the information in this document is subject to change without notice. bipolar analog integrated circuit m m m m pc8126k 900 mhz band direct quadrature modulator ic for digital mobile communication systems document no. p13488ej1v0ds00 (1st edition) date published february 1999 n cp(k) printed in japan preliminary data sheet 1999 description the m pc8126k is a silicon monolithic integrated circuit designed as quadrature modulator for digital mobile communication systems. this ic integrates a pre-mixer for local signals plus a quadrature modulator operating from 889 mhz to 960 mhz. the chip which has been conventionally packaged in 20-pin ssop is packaged in 28-pin qfn and therefore is suitable for higher density mounting. in addition, the ic has power save function and can operate 2.7 to 3.6 v supply voltage. consequently the m pc8126k can contribute to make rf blocks smaller size, higher performance and lower power consumption. features ? directly modulate in 889 mhz to 960 mhz ? built-in pre-mixer for local signals ? external if filter can be applied between modulator output and pre-mixer input terminal. ? current consumption i cc = 35 ma typ. @ v cc = 3.0 v ? equipped with power save function. ? 28-pin qfn suitable for higher density mounting. applications ? digital cellular phones: pdc800m ordering information part number package supplying form m pc8126k-e1 28-pin plastic qfn (5.1 5.5 0.95 mm) embossed tape 12 mm wide. qty 2.5 kp/reel. pins 1 through 10 are in pull-out direction. remark to order evaluation samples, please contact your local nec sales office . (part number for sample order: m pc8126k) caution electro-static sensitive device
preliminary data sheet p13488ej1v0ds00 2 m m m m pc8126k internal block diagram and pin connections (top view) 22 14 13 12 11 10 9 23 24 25 26 27 28 n. c. gnd rf-loin n. c. if-loin v ps 2 gnd n.c. modout v cc 3 n. c. n. c. loinb n. c. loin n. c. v cc 2 v ps 1 n. c. v cc 1 mixout gnd gnd q qb ib i gnd 21 20 19 18 17 16 15 12345678 2 lo 2 phase shifter lo buffer i/q-mix lo pre-mix
preliminary data sheet p13488ej1v0ds00 3 m m m m pc8126k quadrature modulator series product part number functions i cc (ma) f lo1in (mhz) f modout (mhz) up-converter f rfout (mhz) phase shifter package application m pc8101gr 150 mhz quad.mod 15/@2.7 v 100 to 300 50 to 150 external f/f ct-2 etc. m pc8104gr rf up-converter + if quad.mod 28/@3.0 v 100 to 400 900 to 1 900 20-pin ssop (225 mil) m pc8105gr 400 mhz quad.mod 16/@3.0 v 100 to 400 external 16-pin ssop (225 mil) digital comm. m pc8110gr 1 ghz direct quad.mod 24/@3.0 v 800 to 1 000 direct pdc800 mhz, etc. m pc8125gr rf up-converter + if quad.mod + agc 36/@3.0 v 220 to 270 1 800 to 2 000 phs m pc8126gr 915 to 960 915 to 960 (lo pre-mixer) 20-pin ssop (225 mil) m pc8126k 900 mhz direct quad.mod with offset-mixer 35/@3.0 v 889 to 960 889 to 960 doubler + f/f 28-pin qfn pdc800 mhz m pc8129gr 2lo if quad. mod+rf up-converter 28/@3.0 v 200 to 800 100 to 400 800 to 1 900 f/f 20-pin ssop (225 mil) gsm, dcs1800, etc. m pc8139gr-7jh transceiver ic (1.9 ghz indirect quad. mod + rx-if + if vco) tx: 32.5 rx: 4.8 /@3.0 v 220 to 270 1 800 to 2 000 30-pin tssop (225 mil) phs m pc8158k rf up-converter + if quad.mod + agc 28/@3.0 v 100 to 300 800 to 1 500 cr 28-pin qfn pdc800 m/1.5 g remark for outline of the quadrature modulator series, please refer to the application note usage of m m m m pc8101, 8104, 8105, 8125, 8129 (document no. p13251e) and so on.
preliminary data sheet p13488ej1v0ds00 4 m m m m pc8126k application example [pdc800 mhz] to demod rssi out i q sw sub ant sw main ant pc8126 k m 1st mix 1st lo 2nd lo lna pa sw filter 2nd mix pll1 ( 2) f pll2 agc 0 90 2 rssi this block diagram presents the ics location example applied in the system. the system block construction herein is an example.
preliminary data sheet p13488ej1v0ds00 5 m m m m pc8126k absolute maximum ratings parameter symbol test conditions rating unit supply voltage v cc t a = +25 c 4.0 v power save control voltage v ps t a = +25 c 4.0 v power dissipation p d t a = +85 c note 430 mw operating ambient temperature t a C40 to +85 c storage temperature t stg C55 to +150 c note mounted on a 50 50 1.6 mm double sided copper clad epoxy glass pwb. recommended operating conditions parameter symbol test conditions min. typ. max. unit supply voltage v cc 2.7 3.0 3.6 v operating ambient temperature t a C25 +25 +75 c pre-mix. rf input frequency f rfin 689 C 1 200 mhz pre-mix. rf input power p rfin C13 C11 C9 dbm pre-mix. if input frequency f ifin p (f if 7) C65 dbc 120 135 270 mhz pre-mix. if input power p ifin C14 C12 C10 dbm f ifin = 200 mhz 889 C 898 mhz pre-mix. output frequency (modulator output frequency, modulator lo input frequency) f mixout (f modout , f loin ) f ifin = 135 mhz 915 C 960 mhz modulator lo input power p loin C21.5 C18.5 C15.5 dbm i/q input frequency f i/qin dc C 10 mhz single ended input C C 500 i/q input amplitude v i/qin differential input C C 250 mv p-p
preliminary data sheet p13488ej1v0ds00 6 m m m m pc8126k electrical characteristics (t a = +25c, v cc 1 = v cc 2 = v cc 3 = 3.0 v, v ps 1, v ps 2 3 3 3 3 2.2 v unless otherwise specified) parameter symbol test conditions min. typ. max. unit modulator + pre-mixer total (test circuit 1 unless otherwise specified) total circuit current i cc (total) no input signals 24 35 44 ma total circuit current at sleep mode i cc (ps) total v ps 0.5 v (low), no input signals C015 m a modulator output power p modout C12 C9 C6 dbm local oscillator leakage lol note C C35 C30 dbc image rejection imr C C40 C30 dbc i/q 3rd order intermodulation im 3 (i/q) C C45 C30 dbc f if-lo 7 harmonics p (f if 7) f ifin = 135 mhz, p ifin = C12 dbm f rfin = 813 mhz, p rfin = C11 dbm f modout = 948 mhz + f i/q f i/qin = 2.625 khz v i/qin = 500 mv p-p (single ended) i/q (dc) = ib/qb (dc) = v cc /2 data rate: 42 kbps, rnyq: a = 0.5 mod pattern: all zero C C C65 dbc rise time t ps (rise) v ps : low to high, test circuit 2 C35 m s power save response time fall time t ps (fall) v ps : high to low, test circuit 2 C35 m s error vector magnitude evm C 1.6 3.5 %rms adjacent channel power acp ( d f = 50 khz) f ifin = 135 mhz, p ifin = C12 dbm f rfin = 813 mhz, p rfin = C11 dbm f modout = 948 mhz + f i/q f i/qin = 2.625 khz v i/qin = 500 mv p-p (single ended) i/q (dc) = ib/qb (dc) = v cc /2 data rate: 42 kbps, rnyq: a = 0.5 mod pattern: pn9 (pseudo- random pattern) C C65 C60 dbc port current-7 pin i ps (7 pin) no input signals C C 620 m a port current-17 pin i ps (17 pin) no input signals C C 400 m a note f lol = f ifin + f rfin
preliminary data sheet p13488ej1v0ds00 7 m m m m pc8126k standard characteristics for reference (t a = +25c, v cc 1 = v cc 2 = v cc 3 = 3.0 v, v ps 1, v ps 2 3 3 3 3 2.2 v unless otherwise specified) parameter symbol test conditions min. typ. max. unit modulator (test circuit 3) modulator circuit current i cc (mod) no input signals C 27.5 34 ma modulator circuit current at sleep mode i cc (ps) (mod) v ps 0.5 v (low), no input signals C010 m a input impedance i and q port z i/qin f i/q = dc to 10 mhz 90 180 C k w modulator output port vswr vswr (mod) f modout = 948 mhz C 1.5:1 C C pre-mixer (test circuit 4) pre-mixer circuit current i cc (mix) no input signals C 7.5 10 ma pre-mixer circuit current at sleep mode i cc (ps) (mix) v ps 0.5 v (low), no input signals C05 m a pre-mixer conversion gain cg (mix) C5 C3 C1 db pre-mixer output power p out (mix) f rfin = 813 mhz, p rfin = C11 dbm f ifin = 135 mhz, p ifin = C12 dbm f mixout = 948 mhz C17 C15 C13 dbm
preliminary data sheet p13488ej1v0ds00 8 m m m m pc8126k pin explanations pin no. symbol supply voltage (v) pin voltage (v) @3 v description equivalent circuit 2 loinb C 2.6 bypass of lo input for modulator. this pin should be externally grounded through around 33 pf capacitor. 4 loin C 2.6 lo input for the phase shifter. connect around 300 w between pin 4 and 5 to match to 50 w by lc. 2 4 6v cc 2 2.7 to 3.6 C supply voltage pin for the phase shifter and iq mixer. an internal regulator helps keep the device stable against temperature or v cc variation. CCCCCCCCCCCCC 7v ps 1 (modulator) v ps C power save control pin for the modulator can control on/sleep state with bias as follows. v ps (v) state 2.2 to 3.6 on (active mode) 0 to 0.5 off (sleep mode) 7 9gnd (modulator) 0 C ground pin for the modulator. connect to the ground with minimum inductance. track length should be kept as short as possible. CCCCCCCCCCCCC 10 i v cc /2 C input for i signal. this input impedance is 180 k w . in case of that i/q input signals are single ended, amplitude of the signal is 500 mv p-p max. note 11 ib v cc /2 C input for i signal. this input impedance is 180 k w . in case of that i/q input signals are single ended, v cc /2 biased dc signal should be input. in case of that i/q input signals are differential, amplitude of the signal is 250 m v p-p max. note 10 11 note relations between amplitude and v cc /2 bias of input signal are following.
preliminary data sheet p13488ej1v0ds00 9 m m m m pc8126k pin no. symbol supply voltage (v) pin voltage (v) @3 v description equivalent circuit 12 qb v cc /2 C input for q signal. this input impedance is 180 k w . in case of that i/q input signals are single ended, v cc /2 biased dc signal should be input. in case of that i/q input signals are differential, amplitude of the signal is 250 mv p-p max. note 13 q v cc /2 C input for q signal. this input impedance is 180 k w . in case of that i/q input signals are single ended, amplitude of the signal is 500 mv p-p max. note 12 13 14 gnd (modulator) 0 C ground pin for the modulator. connect to the ground with minimum inductance. track length should be kept as short as possible. CCCCCCCCCCCCC 16 v cc 3 2.7 to 3.6 C supply voltage pin for the output buffer amplifier of modulator. an internal regulator helps keep the device stable against temperature or v cc variation. CCCCCCCCCCCCC 17 modout C 1.6 output pin from the modulator. this is emitter follower output. so this output impedance is low. 17 19 gnd (modulator) 0 C ground pin for the modulator. connect to the ground with minimum inductance. track length should be kept as short as possible. CCCCCCCCCCCCC power save control pin can control the on/sleep state with bias as follows. v ps (v) state 2.2 to 3.6 on (active mode) 0 to 0.5 off (sleep mode) 20 v ps 2 (pre-mix) v ps C 20 note relations between amplitude and v cc /2 bias of input signal are following.
preliminary data sheet p13488ej1v0ds00 10 m m m m pc8126k pin no. symbol supply voltage (v) pin voltage (v) @3 v description equivalent circuit 21 if-loin C 1.3 if input pin for the pre-mixer. this pin is biased internally. capacitor should be connected in series, and grounded through 51 w . 21 24 gnd (pre-mix) 0 C ground pin for pre-mixer. connect to the ground with minimum inductance. track length should be kept as short as possible. CCCCCCCCCCCCC 25 rf-loin C 2.3 rf input pin for the pre-mixer. this pin is biased internally. capacitor should be connected in series, and grounded through 51 w . 25 26 v cc 1 (pre-mix) 2.7 to 3.6 C supply voltage pin for the pre-mixer. an internal regulator helps keep the device stable against temperature or v cc variation. CCCCCCCCCCCCC 27 pre-mixout 2.7 to 3.6 C output from the pre-mixer. this pin is designed as open collector. due to the high impedance output, this pin should be externally equipped with lc matching circuit to next stage. 27 28 gnd (modulator) 0 C ground pin for the modulator. connect to the ground with minimum inductance. track length should be kept as short as possible. CCCCCCCCCCCCC 1, 3, 5, 8, 15, 18, 22, 23 n.c. C C non connection pins. CCCCCCCCCCCCC
preliminary data sheet p13488ej1v0ds00 11 m m m m pc8126k i ib qb q 2f/f from loin to modout 2 relation between i/q pin input dc voltage and amplitude i/q input signal (mv p-p ) supply voltage (v) v cc i/q dc voltage (v) v cc /2 = i = ib = q = qb single ended input i = q differential input i = ib = q = qb 2.7 to 3.6 1.35 to 1.8 500 250 explanation of internal function block function/operation block diagram 90 phase shifter input signal from lo is send to digital circuit of t-type flip-flop through frequency doubler. output signal from t-type f/f is changed to same frequency as lo input and that have quadrature phase shift, 0, 90 , 180, 270. these circuits have function of self phase correction to make correctly quadrature signals. buffer amp. buffer amplifiers for each phase signals to send to each mixers. mixer each signals from buffer amp. are quadrature modulated with two double-balanced mixers. high accurate phase and amplitude inputs are realized to good performance for image rejection. adder output signals from each mixers are added with adder and send to final amplifier.
preliminary data sheet p13488ej1v0ds00 12 m m m m pc8126k test circuit 1 pre-mixer + quadrature modulator (except power save response time) bpf rfin ifin 1 000 pf 51 w 51 w spectrum analyzer voltage source voltage source voltage source 0.22? f 1 000 pf 100 pf 0.22 f m m 33 pf 1 000 pf 100 pf v cc 3 (mod) v cc 1 (pre mix) modout 0.22 f 1 000 pf 100 pf signal generator signal generator 22 23 24 25 26 27 28 14 13 12 11 10 9 15 16 17 18 19 20 21 18 7 6 5 4 3 2 tff premixer qin qb ib iin 6.8 nh 6.8 nh 5.6 nh 2.5 pf 7 pf 7 pf 15 nh filter 1 pf 18 nh mixout 33 pf v cc 2 (mod) v ps 1 (mod) 300 w 33 pf 2 pf 33 pf 10 nh 18 nh i/q singnal generator frequency doubler i/q mixer i/q mixer v ps 2 (pre mix)
preliminary data sheet p13488ej1v0ds00 13 m m m m pc8126k test circuit 2 pre-mixer + quadrature modulator (for power save response time) bpf rfin ifin 1 000 pf 51 w 51 w spectrum analyzer voltage source voltage source voltage source 0.22 f m m m 1 000 pf 100 pf 0.22 f 33 pf 1 000 pf 100 pf v cc 3 (mod) v cc 1 (pre mix) modout 0.22 f 1 000 pf 100 pf signal generator signal generator 22 23 24 25 26 27 28 14 13 12 11 10 9 15 16 17 18 19 20 21 18 7 6 5 4 3 2 tff premixer qin qb ib iin 6.8 nh 6.8 nh 5.6 nh 2.5 pf 7 pf 7 pf 15 nh filter 1 pf 18 nh mixout 33 pf v cc 2 (mod) v ps 1 (mod) 300 w 33 pf 33 pf i/q singnal generator frequency doubler i/q mixer i/q mixer palse pattern generator v ps 2 (pre mix) 2 pf 10 nh 18 nh
preliminary data sheet p13488ej1v0ds00 14 m m m m pc8126k test circuit 3 quadrature modulator block 22 21 20 19 18 17 16 15 12345678 modout v cc 3 (mod) spectrum analyzer or network analyzer voltage source 23 24 25 26 27 28 14 13 12 11 10 9 qin qb ib iin 300 w 33 pf 33 pf 33 pf 6.8 nh v cc 2 (mod) loin 2 pf loinb 0.22 f m m 1 000 pf 100 pf voltage source 0.22 f 1 000 pf 100 pf i/q signal generator v ps 1 (mod) voltage source pulse pattern generator signal generator in this case, pin 20 to 27 should be opened or grounded.
preliminary data sheet p13488ej1v0ds00 15 m m m m pc8126k test circuit 4 pre-mixer block 22 21 20 19 18 17 16 15 12345678 modout v cc 3 (mod) 23 24 25 26 27 28 14 13 12 11 10 9 qin qb ib iin 33 pf 51 w v cc 2 (mod) 15 nh 18 nh 1 pf 1 000 pf rfin 51 w bpf ifin v ps 2 (pre mix) v cc 1 (pre mix) spectrum analyzer v ps 1 (mod) voltage source voltage source 0.22 f m 1 000 pf 100 pf signal generator signal generator loin loinb mixout
preliminary data sheet p13488ej1v0ds00 16 m m m m pc8126k package dimensions 28 pin plastic qfn (unit: mm) 4 ?0.5 4 ?0.5 0.5 1.2 5.1 0.1 0.22 0.3 0.95 0.1 0.125 2 0.5 = 1 0.5 5.5 0.1 (5.5 0.1) (5.1) 0.22 1 pin 28 pin 7 0.5 = 3.5 2 0.5 = 1 (5.1 0.1) (4.7) 0.5 (4.1) 0.5 (0.22) 0.5 (4.5) 0.5 (0.22) bottom view 0.5
preliminary data sheet p13488ej1v0ds00 17 m m m m pc8126k note on correct use (1) observe precautions for handling because of electrostatic sensitive devices. (2) form a ground pattern as widely as possible to minimize ground impedance (to prevent undesired operation). (3) keep the track length between the ground pins as short as possible. (4) connect a bypass capacitor (example 1 000 pf) to the v cc pin. recommended soldering conditions this product should be soldered under the following recommended condition. for soldering methods and conditions other than those recommended below, contact your nec sales representative. soldering method soldering conditions recommended condition symbol infrared reflow package peak temperature: 235c or below time: 30 seconds or less (at 210c) count: 2, exposure limit note : none ir35-00-2 partial heating pin temperature: 300c time: 3 seconds or less (per side of device) exposure limit note : none C note after opening the dry pack, keep it in a place below 25c and 65% rh for the allowable storage period. caution do not use different soldering methods together (except for partial heating). for details of recommended soldering conditions for surface mounting, refer to information document semiconductor device mounting technology manual (c10535e) .
preliminary data sheet p13488ej1v0ds00 18 m m m m pc8126k [memo]
preliminary data sheet p13488ej1v0ds00 19 m m m m pc8126k [memo]
m m m m pc8126k the application circuits and their parameters are for reference only and are not intended for use in actual design-ins. no part of this document may be copied or reproduced in any form or by any means without the prior written consent of nec corporation. nec corporation assumes no responsibility for any errors which may appear in this document. nec corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. no license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of nec corporation or others. while nec corporation has been making continuous effort to enhance the reliability of its semiconductor devices, the possibility of defects cannot be eliminated entirely. to minimize risks of damage or injury to persons or property arising from a defect in an nec semiconductor device, customers must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features. nec devices are classified into the following three quality grades: "standard", "special", and "specific". the specific quality grade applies only to devices developed based on a customer designated "quality assurance program" for a specific application. the recommended applications of a device depend on its quality grade, as indicated below. customers must check the quality grade of each device before using it in a particular application. standard: computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots special: transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) specific: aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. the quality grade of nec devices is "standard" unless otherwise specified in nec's data sheets or data books. if customers intend to use nec devices for applications other than those specified for standard quality grade, they should contact an nec sales representative in advance. anti-radioactive design is not implemented in this product. m4 96. 5

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